Series-Terminated Transmitter in 65nm Bulk CMOS

Source-series-terminated (SST) drivers offer the advantage of providing a large range of termination voltages, making them particularly suitable for multi-standard I/Os [1, 2]. Many standards (e.g. [3]) however, call for larger vertical eye openings that require raising the dc supply voltage from the l.OV limit for thinoxide devices in 65nm technology to 1.2 or 1.5V. These requirements are addressed in the proposed SST transmitter design by combining a thin-oxide pre-driver stage running at l.OV followed by thick-oxide output stages operated at 1.5V. Key features of this design include the implementation of tri-statable output slices consisting of programmable binary-weighted pre-distortion slices to achieve a mutually independent adjustment of the impedance tuning and FIR-based transmitter equalization, the level shifter design and the application of T-coils [4] that enable a broad-band impedance matching with a return loss of -16dB over 10GHz bandwidth. Moreover, the transmitter is capable to suppress the clock duty-cycle distortion by a factor of 5x.